1. Field of the Invention
The present invention relates to techniques for processing several simultaneous threads (known as “Simultaneous Multi-Threading”, or SMT) that are implemented in processor architectures having several execution contexts (multicontext processor), such as in processor cores having several simultaneous execution contexts (known as “Simultaneous Multi-Threaded processors”, or SMTs).
2. Description of the Related Art
Over the last ten years, research has been carried out to improve the paralleling of threads and the use of execution units in a processor core. Simultaneous multithreading is a well-known technique in the field of single-processor architectures, (see Patent Application US 2002/0083297) or multiprocessor architectures (see Patent Application US 2003/0088610). It makes it possible to increase the processing speed of a microprocessor, whether it has a superscalar or other architecture (that is to say whether it has several or just one execution unit). A thread is a component of a process corresponding to a sequence of elementary operations. In a processor having several simultaneous execution contexts, a thread is executed in one of the contexts of the processor. An execution context therefore designates the state of all the registers of the processor when it is allocated to a thread.
An execution context typically comprises nonprivileged registers, that is to say ones that can be accessed by the applications in user mode, and privileged registers, that is to say ones that can be accessed by the operating system (or OS) in privileged mode only. These latter comprise, in particular, configuration registers, such as the base address register of the translation table of a memory management unit (or MMU).
In a conventional SMT processor core architecture, all the simultaneous execution contexts have the same rights of access to the peripherals, to the memory, and to the registers, etc. This is why such an architecture is said to be symmetric in what follows. In fact, a process which is executed in the privileged mode of any one of the simultaneous execution contexts possesses full control of the hardware resources of the processor and can therefore in practice divert the system from its normal use.
However, a requirement has recently appeared for the secure processing of sensitive information such as a user's bank identification data (for example a bank account number or a credit card code). A requirement exists to be able to continue to execute a pre-existing operating system (known as a “Legacy OS”), such as Windows® or Linux®, and its associated application programs, while being able to oversee them in such a way that they do not jeopardize the integrity and the security of the system if a hacker were to take control of these OSs by exploiting their numerous flaws.
A trend observed in the state of the art consists in favoring an essentially hardware approach to achieve a certain level of security. According to such an approach, additional hardware make it possible to encapsulate and therefore to protect a secure domain inside the processor by effecting a hardware separation between a nonsecure mode and a secure mode. This approach is used, to mention but a few, in the Nomadik® family of multimedia application processors from STMicroelectronics, in products based on the Trustzone™ technology from ARM, or in those based on the NGSCB (“Next Generation Secure Computing Base”) technology from Microsoft®.